Invention Grant
US08732416B2 Requester based transaction status reporting in a system with multi-level memory
有权
在具有多级内存的系统中基于请求者的事务状态报告
- Patent Title: Requester based transaction status reporting in a system with multi-level memory
- Patent Title (中): 在具有多级内存的系统中基于请求者的事务状态报告
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Application No.: US13239045Application Date: 2011-09-21
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Publication No.: US08732416B2Publication Date: 2014-05-20
- Inventor: Raguram Damodaran , Abhijeet Ashok Chachad , Ramakrishnan Venkatasubramanian , Dheera Balasubramanian , Naveen Bhoria
- Applicant: Raguram Damodaran , Abhijeet Ashok Chachad , Ramakrishnan Venkatasubramanian , Dheera Balasubramanian , Naveen Bhoria
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Robert D. Marshall, Jr.; W. James Brady; Frederick J. Telecky, Jr.
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F12/02
Abstract:
A system has memory resources accessible by a central processing unit (CPU). One or more transaction requests are initiated by the CPU for access to one or more of the memory resources. Initiation of transaction requests is ceased for a period of time. The memory resources are monitored to determine when all of the transaction requests initiated by the CPU have been completed. An idle signal accessible by the CPU is provided that is asserted when all of the transaction requests initiated by the CPU have been completed.
Public/Granted literature
- US20120079102A1 Requester Based Transaction Status Reporting in a System with Multi-Level Memory Public/Granted day:2012-03-29
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