Invention Grant
US08732532B2 Memory controller and information processing system for failure inspection
有权
内存控制器和信息处理系统进行故障检测
- Patent Title: Memory controller and information processing system for failure inspection
- Patent Title (中): 内存控制器和信息处理系统进行故障检测
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Application No.: US13226672Application Date: 2011-09-07
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Publication No.: US08732532B2Publication Date: 2014-05-20
- Inventor: Masanori Higeta
- Applicant: Masanori Higeta
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2010-261110 20101124
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
An information processing system comprises a memory module having a plurality of unit memory regions, a memory controller, connected to the memory module via memory interface, configured to control access to the memory module, an error detector, which is in the memory controller, configured to perform an error detection on data read from the memory module, a failure inspection controller configured to switch a mode of the memory controller from a normal mode to a failure inspection mode, read data from an address, where data was written, to be inspected for each of the plurality of unit memory regions, cause the error detector to detect an error in the read data and perform a failure inspection and a determining unit configured to determine a memory failure or a transmission path failure on the basis of the state of the error detected from the unit memory regions.
Public/Granted literature
- US20120131382A1 MEMORY CONTROLLER AND INFORMATION PROCESSING SYSTEM Public/Granted day:2012-05-24
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