Invention Grant
- Patent Title: Memory system and control method thereof
- Patent Title (中): 存储系统及其控制方法
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Application No.: US13238685Application Date: 2011-09-21
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Publication No.: US08732553B2Publication Date: 2014-05-20
- Inventor: Yasushi Nagadomi , Daisaburo Takashima
- Applicant: Yasushi Nagadomi , Daisaburo Takashima
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2010-290778 20101227
- Main IPC: G11C29/00
- IPC: G11C29/00

Abstract:
The embodiments include an error correction processing unit and an error correction history recording unit. The error correction processing unit performs an error correction process based on data read from a non-volatile semiconductor memory and a second-step error correction code corresponding to the data. The error correction history recording unit records error correction history indicating whether first error correction is successful through the first error correction process, in association with unit data. When error correction history of target unit data to be read indicates that correction is not successful, the second error correction process is executed without executing the first error correction process.
Public/Granted literature
- US20120166906A1 MEMORY SYSTEM AND CONTROL METHOD THEREOF Public/Granted day:2012-06-28
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