Invention Grant
US08732565B2 Method and apparatus for parallel processing in a gigabit LDPC decoder 有权
用于在千兆位LDPC解码器中并行处理的方法和装置

Method and apparatus for parallel processing in a gigabit LDPC decoder
Abstract:
A receiver for use in a wireless communications network capable of decoding encoded transmissions. The receiver comprises receive path circuitry for receiving and downconverting an incoming radio frequency (RF) signal to produce an encoded received signal; and a low-density parity check (LDPC) decoder associated with the receive path circuitry for decoding the encoded received signal. The LDPC decoder further comprises a memory for storing a parity check H matrix comprising R rows and C columns, where each element of the parity check H matrix comprises one of a shift value or a −1 value; and a plurality of processing elements for performing LDPC layered decoding, wherein at least one processing element is operable to process in the same cycle a first row and a second row of the parity check H matrix.
Information query
Patent Agency Ranking
0/0