Invention Grant
US08732565B2 Method and apparatus for parallel processing in a gigabit LDPC decoder
有权
用于在千兆位LDPC解码器中并行处理的方法和装置
- Patent Title: Method and apparatus for parallel processing in a gigabit LDPC decoder
- Patent Title (中): 用于在千兆位LDPC解码器中并行处理的方法和装置
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Application No.: US13159091Application Date: 2011-06-13
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Publication No.: US08732565B2Publication Date: 2014-05-20
- Inventor: Eran Pisek , Shadi Abu-Surra
- Applicant: Eran Pisek , Shadi Abu-Surra
- Applicant Address: KR Suwon-Si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-Si
- Main IPC: G06F11/00
- IPC: G06F11/00 ; H03M13/00

Abstract:
A receiver for use in a wireless communications network capable of decoding encoded transmissions. The receiver comprises receive path circuitry for receiving and downconverting an incoming radio frequency (RF) signal to produce an encoded received signal; and a low-density parity check (LDPC) decoder associated with the receive path circuitry for decoding the encoded received signal. The LDPC decoder further comprises a memory for storing a parity check H matrix comprising R rows and C columns, where each element of the parity check H matrix comprises one of a shift value or a −1 value; and a plurality of processing elements for performing LDPC layered decoding, wherein at least one processing element is operable to process in the same cycle a first row and a second row of the parity check H matrix.
Public/Granted literature
- US20110307760A1 METHOD AND APPARATUS FOR PARALLEL PROCESSING IN A GIGABIT LDPC DECODER Public/Granted day:2011-12-15
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