Invention Grant
- Patent Title: System in package (SIP) with dual laminate interposers
- Patent Title (中): 封装系统(SIP),配有双层压插层
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Application No.: US11786610Application Date: 2007-04-12
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Publication No.: US08735183B2Publication Date: 2014-05-27
- Inventor: David J. Corisis , Matt Schwab
- Applicant: David J. Corisis , Matt Schwab
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder, P.C.
- Main IPC: G01R31/26
- IPC: G01R31/26

Abstract:
There is provided a semiconductor device assembly with an interposer and method of manufacturing the same. More specifically, in one embodiment, there is provided a semiconductor device assembly comprising a semiconductor substrate, at least one semiconductor die attached to the semiconductor substrate, an interposer disposed on the semiconductor die, and a controller attached to the interposer. There is also provided a method of manufacturing comprising forming a first subassembly by coupling a substrate and a semiconductor die, and forming second subassembly by attaching a controller to an interposer, and coupling the first subassembly to the second subassembly.
Public/Granted literature
- US20080254571A1 System in package (SIP) with dual laminate interposers Public/Granted day:2008-10-16
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