Invention Grant
- Patent Title: Manufacturing method of dual-gate thin film transistor
- Patent Title (中): 双栅极薄膜晶体管的制造方法
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Application No.: US13214443Application Date: 2011-08-22
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Publication No.: US08735231B2Publication Date: 2014-05-27
- Inventor: Hidekazu Miyairi , Takafumi Mizoguchi
- Applicant: Hidekazu Miyairi , Takafumi Mizoguchi
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Nixon Peabody LLP
- Agent Jeffrey L. Costellia
- Priority: JP2010-189916 20100826
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/00 ; H01L21/84 ; H01L21/70 ; H01L21/283 ; H01L29/786

Abstract:
A dual-gate transistor including: a first insulating layer provided to cover a first conductive layer; a first semiconductor layer over the first insulating layer; second semiconductor layers over the first semiconductor layer, the second semiconductor layers are spaced from each other to expose the first semiconductor layer; impurity semiconductor layers over the second semiconductor layers; second conductive layers over the impurity semiconductor layers; second insulating layers over the second conductive layers; a third insulating layer to cover the first semiconductor layer, the second semiconductor layers, the impurity semiconductor layers, the second conductive layers, and the second insulating layers; and a third conductive layer at least over the third insulating layer, and in the dual-gate transistor including the first to third insulating layers with openings, the first insulating layer is substantially equal in thickness to the second insulating layer.
Public/Granted literature
- US20120049283A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2012-03-01
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