Invention Grant
- Patent Title: Method for manufacturing nonvolatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件的制造方法
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Application No.: US13601493Application Date: 2012-08-31
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Publication No.: US08735246B2Publication Date: 2014-05-27
- Inventor: Shuichi Kuboi , Tadashi Iguchi , Masao Iwase , Toru Matsuda
- Applicant: Shuichi Kuboi , Tadashi Iguchi , Masao Iwase , Toru Matsuda
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2012-039327 20120224
- Main IPC: H01L21/338
- IPC: H01L21/338

Abstract:
According to one embodiment, a method is disclosed for manufacturing nonvolatile semiconductor memory device including forming a stacked body by alternately stacking an electrode layer and a layer-to-be-etched, and forming an oxidized layer between the layer-to-be-etched provided at least in any side of an upper side and a lower side of the electrode layer and the electrode layer. The method can include forming a groove which passes through the stacked body. The method can include embedding an insulating body within the groove. The method can include forming a hole which passes through the stacked body. The method can include selectively removing the layer-to-be-etched via the hole. The method can include forming a charge storage layer in an inner side of the hole. The method can include forming a channel body layer in an inner side of the charge storage layer.
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