Invention Grant
- Patent Title: Copper etch scheme for copper interconnect structure
- Patent Title (中): 铜互连结构的铜蚀刻方案
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Application No.: US13550951Application Date: 2012-07-17
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Publication No.: US08735278B2Publication Date: 2014-05-27
- Inventor: Ming Han Lee , Hai-Ching Chen , Hsiang-Huan Lee , Tien-I Bao , Chi-Lin Teng
- Applicant: Ming Han Lee , Hai-Ching Chen , Hsiang-Huan Lee , Tien-I Bao , Chi-Lin Teng
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufactring Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufactring Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
The present disclosure is directed to a method of manufacturing an interconnect structure in which a low-k dielectric layer is formed over a semiconductor substrate followed by formation of a copper or copper alloy layer over the low-k dielectric layer. The copper or copper alloy layer is patterned and etched to form a copper body having recesses, which are then filled with a low-k dielectric material. The method allows for formation of a damascene structures without encountering the various problems presented by non-planar features and by porus low-K dielectric damage.
Public/Granted literature
- US20140021611A1 Novel Copper Etch Scheme for Copper Interconnect Structure Public/Granted day:2014-01-23
Information query
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