Invention Grant
- Patent Title: Nonvolatile semiconductor memory device and manufacturing method thereof
- Patent Title (中): 非易失性半导体存储器件及其制造方法
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Application No.: US13275014Application Date: 2011-10-17
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Publication No.: US08735966B2Publication Date: 2014-05-27
- Inventor: Toshitake Yaegashi
- Applicant: Toshitake Yaegashi
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2009-060929 20090313
- Main IPC: H01L29/792
- IPC: H01L29/792
Abstract:
First and second memory cells have first and second channels, first and second tunnel insulating films, first and second charge storage layers formed of an insulating film, first and second block insulating films, and first and second gate electrodes. A first select transistor has a third channel, a first gate insulating film, and a first gate electrode. The first channel includes a first-conductivity-type region and a second-conductivity-type region which is formed on at least a part of the first-conductivity-type region and whose conductivity type is opposite to the first conductivity type. The third channel includes the first-conductivity-type region and the second-conductivity-type region formed on the first-conductivity-type region. The number of data stored in the first memory cell is smaller than that of data stored in the second memory cell.
Public/Granted literature
- US20120032251A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2012-02-09
Information query
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