Invention Grant
- Patent Title: Semiconductor devices having reduced gate-drain capacitance
- Patent Title (中): 具有降低的栅 - 漏电容的半导体器件
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Application No.: US13034084Application Date: 2011-02-24
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Publication No.: US08735978B2Publication Date: 2014-05-27
- Inventor: Ljubo Radic , Edouard D. de Frésart
- Applicant: Ljubo Radic , Edouard D. de Frésart
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Sherry W. Schumm
- Main IPC: H01L29/72
- IPC: H01L29/72
Abstract:
Embodiments of a semiconductor device include a semiconductor substrate having a first surface and a second surface opposed to the first surface, a trench formed in the semiconductor substrate and extending from the first surface partially through the semiconductor substrate, a gate electrode material deposited in the trench, and a void cavity in the semiconductor substrate between the gate electrode material and the second surface. A portion of the semiconductor substrate is located between the void cavity and the second surface.
Public/Granted literature
- US20110147835A1 SEMICONDUCTOR DEVICES HAVING REDUCED GATE-DRAIN CAPACITANCE Public/Granted day:2011-06-23
Information query
IPC分类:
