Invention Grant
US08736065B2 Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming the same
有权
具有具有多个垂直嵌入的裸片的基板的多芯片封装及其形成工艺
- Patent Title: Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming the same
- Patent Title (中): 具有具有多个垂直嵌入的裸片的基板的多芯片封装及其形成工艺
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Application No.: US12976903Application Date: 2010-12-22
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Publication No.: US08736065B2Publication Date: 2014-05-27
- Inventor: Javier Soto Gonzalez , Houssam Jomaa
- Applicant: Javier Soto Gonzalez , Houssam Jomaa
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L23/00
- IPC: H01L23/00
Abstract:
An apparatus includes a substrate having a land side having a plurality of contact pads and a die side opposite the land side. The apparatus includes a first die and a second die wherein the first die and second die are embedded within the substrate such that the second die is located between the first die and the land side of the substrate.
Public/Granted literature
Information query
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