Invention Grant
US08736076B2 Multi-chip stacking of integrated circuit devices using partial device overlap
有权
使用部分器件重叠的集成电路器件的多芯片堆叠
- Patent Title: Multi-chip stacking of integrated circuit devices using partial device overlap
- Patent Title (中): 使用部分器件重叠的集成电路器件的多芯片堆叠
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Application No.: US13572135Application Date: 2012-08-10
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Publication No.: US08736076B2Publication Date: 2014-05-27
- Inventor: Donald E. Hawk
- Applicant: Donald E. Hawk
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Main IPC: H01L23/12
- IPC: H01L23/12 ; H01L21/00
Abstract:
One aspect provides an integrated circuit (IC) packaging assembly that comprises a substrate having conductive traces located thereon, wherein the signal traces are located in an IC device region and the power traces are located in a wafer level fan out (WLFO) region located lateral the IC device region. This embodiment further comprises a first IC device located on a first side of the substrate within the IC device region and that contacts the signal traces in the IC device region. A second IC device is located on a second side of the substrate opposite the first side and overlaps the IC device region and the WLFO region. The second IC device contacts a first portion of the signal traces in the IC device region and contacts a first portion of the power traces in the WLFO region.
Public/Granted literature
- US20140042601A1 MULTI-CHIP STACKING OF INTEGRATED CIRCUIT DEVICES USING PARTIAL DEVICE OVERLAP Public/Granted day:2014-02-13
Information query
IPC分类:
