Invention Grant
US08736314B2 Leakage power management using programmable power gating transistors and on-chip aging and temperature tracking circuit 有权
漏电功率管理采用可编程电源门控晶体管和片上老化和温度跟踪电路

Leakage power management using programmable power gating transistors and on-chip aging and temperature tracking circuit
Abstract:
The number of power-gating transistors on an integrated circuit used for power reduction in a sleep mode is controlled during a wake state to adjust the current flow and hence voltage drop across the power-gating transistors as a function of aging of these transistors and/or a function of temperature of the integrated circuit. In this way, the supply voltage to the integrated circuit may be better tailored to minimize current leakage when the integrated circuit is young or operating at low temperatures.
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