Invention Grant
- Patent Title: Delay line calibration
- Patent Title (中): 延迟线校准
-
Application No.: US12769806Application Date: 2010-04-29
-
Publication No.: US08736384B2Publication Date: 2014-05-27
- Inventor: Ashoke Ravi , Ofir Degani , Hasnain Lakdawala , Masoud Sajadieh
- Applicant: Ashoke Ravi , Ofir Degani , Hasnain Lakdawala , Masoud Sajadieh
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Shichrur & Co.
- Main IPC: H03L7/095
- IPC: H03L7/095

Abstract:
In some embodiments, provided are calibration techniques for measuring mismatches between TDL delay stage elements, and in some cases, then compensating for the mismatches to minimize performance degradation.
Public/Granted literature
- US20110267120A1 DELAY LINE CALIBRATION Public/Granted day:2011-11-03
Information query