Invention Grant
US08737132B2 Charge cycling by equalizing the source and bit line levels between pulses during no-verify write operations for NAND flash memory
有权
通过在NAND闪存的非验证写入操作期间均衡脉冲之间的源和位线电平来进行充电循环
- Patent Title: Charge cycling by equalizing the source and bit line levels between pulses during no-verify write operations for NAND flash memory
- Patent Title (中): 通过在NAND闪存的非验证写入操作期间均衡脉冲之间的源和位线电平来进行充电循环
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Application No.: US13570826Application Date: 2012-08-09
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Publication No.: US08737132B2Publication Date: 2014-05-27
- Inventor: Hao Thai Nguyen , Juan Carlos Lee , Seungpil Lee , Jongmin Park , Man Lung Mui
- Applicant: Hao Thai Nguyen , Juan Carlos Lee , Seungpil Lee , Jongmin Park , Man Lung Mui
- Applicant Address: US TX Plano
- Assignee: SanDisk Technologies Inc.
- Current Assignee: SanDisk Technologies Inc.
- Current Assignee Address: US TX Plano
- Agency: Davis Wright Tremaine LLP
- Main IPC: G11C16/04
- IPC: G11C16/04
Abstract:
In non-volatile memory devices, a write typically consists of an alternating set of pulse and verify operations. At the end of a pulse, the device must be biased properly for an accurate verify, after which the device is re-biased for the next pulse. In some cases a non-volatile memory is programmed by an alternating set of pulses, but, for at least some pulses without any intervening verify operations. After a one pulse, but before biasing the memory for the next pulse without an intervening very, the source and bit line levels can be left to float.
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