A device controller, such as a universal serial bus (“USB”) device controller, that is unattached to an external device is placed into a low power mode. During low power mode, interface components of the device controller are gated or placed into a reduced power state. For example, components such as a USB gadget PHY, which manages physical layer communication, USB direct memory access clock, secondary clocks, and so forth may be gated. Upon receiving a connection event indicating attachment of a device to the USB, the device controller resumes normal power operation. This device controller low power mode may work in conjunction with state retention modes or other low power modes affecting other components within an electronic device.