Invention Grant
US08739008B2 Method for determining parity check matrix utilized in flash memory system and related flash memory system thereof 有权
用于确定闪存系统中使用的奇偶校验矩阵的方法及其相关闪存系统

  • Patent Title: Method for determining parity check matrix utilized in flash memory system and related flash memory system thereof
  • Patent Title (中): 用于确定闪存系统中使用的奇偶校验矩阵的方法及其相关闪存系统
  • Application No.: US13402725
    Application Date: 2012-02-22
  • Publication No.: US08739008B2
    Publication Date: 2014-05-27
  • Inventor: Zhen-U Liu
  • Applicant: Zhen-U Liu
  • Applicant Address: TW Jhubei, Hsinchu County
  • Assignee: Silicon Motion, Inc.
  • Current Assignee: Silicon Motion, Inc.
  • Current Assignee Address: TW Jhubei, Hsinchu County
  • Agency: McClure, Qualey & Rodack, LLP
  • Main IPC: H03M13/00
  • IPC: H03M13/00
Method for determining parity check matrix utilized in flash memory system and related flash memory system thereof
Abstract:
A method for determining a parity check matrix utilized in a flash memory system is disclosed. The parity check matrix comprises M×N blocks. The method includes generating a first set of candidate blocks as candidates of a first set of blocks of the M×N blocks; calculating a plurality of first estimated results corresponding to the first set of candidate blocks; determining content of a first block of the M×N blocks according to a best result of the first estimated results; generating a second set of candidate blocks as candidates of a second set of blocks of the M×N blocks; calculating a plurality of second estimated results corresponding to the second set of candidate blocks by considering the content of the first block; determining content a second block of the M×N blocks according to the second estimated results.
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