Invention Grant
- Patent Title: Chip package and fabrication method thereof
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Application No.: US14074519Application Date: 2013-11-07
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Publication No.: US08741683B2Publication Date: 2014-06-03
- Inventor: Yu-Lung Huang , Tsang-Yu Liu
- Applicant: Xintec Inc.
- Agency: Liu & Liu
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region; and an auxiliary pattern having a hollow pattern formed in the spacing layer, a material pattern located between the spacing layer and the device region, or combinations thereof.
Public/Granted literature
- US20140065769A1 CHIP PACKAGE AND FABRICATION METHOD THEREOF Public/Granted day:2014-03-06
Information query
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