Invention Grant
US08741709B2 Vertical power MOSFET and IGBT fabrication process with two fewer photomasks
有权
垂直功率MOSFET和IGBT制造工艺,具有两个较少的光掩模
- Patent Title: Vertical power MOSFET and IGBT fabrication process with two fewer photomasks
- Patent Title (中): 垂直功率MOSFET和IGBT制造工艺,具有两个较少的光掩模
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Application No.: US13113797Application Date: 2011-05-23
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Publication No.: US08741709B2Publication Date: 2014-06-03
- Inventor: Kyoung Wook Seok , Jae Yong Choi , Vladimir Tsukanov
- Applicant: Kyoung Wook Seok , Jae Yong Choi , Vladimir Tsukanov
- Applicant Address: US CA Milpitas
- Assignee: IXYS Corporation
- Current Assignee: IXYS Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Imperium Patent Works
- Agent Amir V. Adibi
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
A process for fabrication of a power semiconductor device is disclosed in which a single photomask is used to define each of p-conductivity well regions and n-conductivity type source regions. In the process a single photomask is deposited on a layer of polysilicon on a wafer, the polysilicon layer is removed from first regions of the power semiconductor device where the p-conductivity well regions and the n-conductivity type source regions are to be formed, and both p-conductivity type and n-conductivity type dopants are introduced into the wafer through the first regions.
Public/Granted literature
- US20110312137A1 Vertical Power MOSFET and IGBT Fabrication Process with Two Fewer Photomasks Public/Granted day:2011-12-22
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