Invention Grant
US08741717B2 Methods for fabricating integrated circuits having improved metal gate structures
有权
具有改进的金属栅结构的集成电路的制造方法
- Patent Title: Methods for fabricating integrated circuits having improved metal gate structures
- Patent Title (中): 具有改进的金属栅结构的集成电路的制造方法
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Application No.: US13539837Application Date: 2012-07-02
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Publication No.: US08741717B2Publication Date: 2014-06-03
- Inventor: Kim Hoon
- Applicant: Kim Hoon
- Applicant Address: KY Grand Cayman
- Assignee: Globalfoundries, Inc.
- Current Assignee: Globalfoundries, Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/336 ; H01L21/8238 ; H01L21/3205 ; H01L21/4763
Abstract:
Methods for fabricating integrated circuits are provided. One method includes forming first and second FET trenches in an interlayer dielectric material on a semiconductor substrate. The first FET trench is partially filled with a first work function metal to define an inner cavity in the first FET trench. The first work function metal is a N-type work function metal or a P-type work function metal. The N-type work function metal is selected from the group consisting of titanium, tantalum, hafnium, ytterbium silicide, erbium silicide, and titanium silicide. The P-type work function metal is selected from the group consisting of cobalt, nickel, and tungsten silicide. The inner cavity and the second FET trench are filled with a second work function metal to form corresponding metal gate structures. The second work function metal is the other of the N-type work function metal or the P-type work function metal.
Public/Granted literature
- US20140004693A1 METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING IMPROVED METAL GATE STRUCTURES Public/Granted day:2014-01-02
Information query
IPC分类:
