Invention Grant
US08741728B2 Circuit, biasing scheme and fabrication method for diode accessed cross-point resistive memory array
有权
二极管访问交叉点电阻式存储器阵列的电路,偏置方案和制造方法
- Patent Title: Circuit, biasing scheme and fabrication method for diode accessed cross-point resistive memory array
- Patent Title (中): 二极管访问交叉点电阻式存储器阵列的电路,偏置方案和制造方法
-
Application No.: US13614513Application Date: 2012-09-13
-
Publication No.: US08741728B2Publication Date: 2014-06-03
- Inventor: Jun Liu , David Porter
- Applicant: Jun Liu , David Porter
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dickstein Shapiro LLP
- Main IPC: H01L21/02
- IPC: H01L21/02

Abstract:
Methods, systems, structures and arrays are disclosed, such as a resistive memory array which includes access devices, for example, back-to-back Zener diodes, that only allow current to pass through a coupled resistive memory cell when a voltage drop applied to the access device is greater than a critical voltage. The array may be biased to reduce standby currents and improve delay times between programming and read operations.
Public/Granted literature
- US20130011992A1 CIRCUIT, BIASING SCHEME AND FABRICATION METHOD FOR DIODE ACCESSED CROSS-POINT RESISTIVE MEMORY ARRAY Public/Granted day:2013-01-10
Information query
IPC分类: