Invention Grant
- Patent Title: Methods of manufacturing three-dimensional semiconductor devices
- Patent Title (中): 制造三维半导体器件的方法
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Application No.: US13165256Application Date: 2011-06-21
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Publication No.: US08741761B2Publication Date: 2014-06-03
- Inventor: Jaegoo Lee , Byungkwan You , Youngwoo Park , Kwang Soo Seol
- Applicant: Jaegoo Lee , Byungkwan You , Youngwoo Park , Kwang Soo Seol
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2010-0059150 20100622
- Main IPC: H01L23/3205
- IPC: H01L23/3205 ; H01L21/31

Abstract:
Methods of manufacturing three-dimensional semiconductor devices that may include forming a first spacer on a sidewall inside a first opening formed in a first stack structure, forming a sacrificial filling pattern on the spacer to fill the first opening, forming a second stack structure including a second opening exposing the sacrificial filling pattern on the first stack structure, forming a second spacer on a sidewall inside the second opening, removing the sacrificial filling pattern and removing the first spacer and the second spacer.
Public/Granted literature
- US20110312174A1 Methods Of Manufacturing Three-Dimensional Semiconductor Devices Public/Granted day:2011-12-22
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