Invention Grant
- Patent Title: Logic compatible RRAM structure and process
- Patent Title (中): 逻辑兼容的RRAM结构和过程
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Application No.: US13674193Application Date: 2012-11-12
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Publication No.: US08742390B1Publication Date: 2014-06-03
- Inventor: Kuo-Chi Tu , Wen-Ting Chu , Yu-Wen Liao , Chih-Yang Chang , Hsia-Wei Chen , Chin-Chieh Yang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L47/00
- IPC: H01L47/00 ; G11C11/00

Abstract:
A memory cell and method including a first electrode conformally formed through a first opening in a first dielectric layer, a resistive layer conformally formed on the first electrode, a second electrode conformally formed on the resistive layer, and a second dielectric layer conformally formed on the second electrode, the second dielectric layer including a second opening. The first dielectric layer is formed on a substrate including a first metal layer. The first electrode and the resistive layer collectively include a first lip region that extends a first distance beyond a region defined by the first opening. The second electrode and the second dielectric layer collectively include a second lip region that extends a second distance beyond the region defined by the first opening. The second electrode is coupled to a second metal layer using a via that extends through the second opening.
Public/Granted literature
- US20140131651A1 LOGIC COMPATIBLE RRAM STRUCTURE AND PROCESS Public/Granted day:2014-05-15
Information query
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