Invention Grant
US08742547B2 Semiconductor wafer and its manufacture method, and semiconductor chip
有权
半导体晶圆及其制造方法,以及半导体芯片
- Patent Title: Semiconductor wafer and its manufacture method, and semiconductor chip
- Patent Title (中): 半导体晶圆及其制造方法,以及半导体芯片
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Application No.: US13027695Application Date: 2011-02-15
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Publication No.: US08742547B2Publication Date: 2014-06-03
- Inventor: Kazutaka Yoshizawa , Taiji Ema
- Applicant: Kazutaka Yoshizawa , Taiji Ema
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2010-068648 20100324; JP2010-215753 20100927
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L21/44 ; H01L23/58

Abstract:
A semiconductor wafer includes: a first semiconductor chip area formed with a semiconductor element; a second semiconductor chip area formed with a semiconductor element; and a scribe area sandwiched between the first and second semiconductor chip areas; wherein: the first semiconductor chip area includes a first metal ring surrounding the semiconductor element formed in the first semiconductor chip area; and the metal ring is constituted of a plurality of metal layers including a lower metal layer and an upper metal layer superposed upon the lower metal layer, and the upper metal layer is superposed upon the lower metal layer in such a manner that an outer side wall of the upper metal layer is flush with the outer side wall of the lower metal layer or is at an inner position of the first semiconductor chip area relative to the outer side wall of the lower metal layer.
Public/Granted literature
- US20110233735A1 SEMICONDUCTOR WAFER AND ITS MANUFACTURE METHOD, AND SEMICONDUCTOR CHIP Public/Granted day:2011-09-29
Information query
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