Invention Grant
- Patent Title: Recessed and embedded die coreless package
- Patent Title (中): 嵌入式嵌入式无芯封装
-
Application No.: US12655321Application Date: 2009-12-29
-
Publication No.: US08742561B2Publication Date: 2014-06-03
- Inventor: John Guzek
- Applicant: John Guzek
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Winkle, PLLC
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a cavity in a plating material to hold a die, attaching the die in the cavity, forming a dielectric material adjacent the die, forming vias in the dielectric material adjacent the die, forming PoP lands in the vias, forming interconnects in the vias, and then removing the plating material to expose the PoP lands and die, wherein the die is disposed above the PoP lands.
Public/Granted literature
- US20110156231A1 Recessed and embedded die coreless package Public/Granted day:2011-06-30
Information query
IPC分类: