Invention Grant
- Patent Title: Method for making via interconnection
- Patent Title (中): 通过互连方式制作
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Application No.: US13124003Application Date: 2009-10-15
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Publication No.: US08742588B2Publication Date: 2014-06-03
- Inventor: Peter Nilsson , Jürgen Leib , Robert Thorslund
- Applicant: Peter Nilsson , Jürgen Leib , Robert Thorslund
- Applicant Address: SE Uppsala
- Assignee: ÅAC Microtec AB
- Current Assignee: ÅAC Microtec AB
- Current Assignee Address: SE Uppsala
- Agency: Foley & Lardner LLP
- Priority: SE0850036 20081015
- International Application: PCT/SE2009/051175 WO 20091015
- International Announcement: WO2010/044741 WO 20100422
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L21/4763 ; H01L21/44 ; H01L25/16 ; H01L23/48 ; H01L25/065 ; H01L21/768

Abstract:
The present invention provides a method of forming a via hole (9), or a via (7), from a lower side (5) of a substrate (3) for electronic devices towards an upper side (4) of a substrate (3) at least partly through the substrate (3). The method comprises the steps of: etching a first lengthwise portion (11) of the via hole (9) and etching a second lengthwise portion (12) of the via hole (9); whereby the first lengthwise portion (11) and the second lengthwise portion (12) substantially form the via hole (9) and a constriction (23) is formed in the via hole (9). The constriction (23) defines an aperture (24) of the via hole (9) and the method further comprises the step of opening the via hole (9) by etching, with the constriction (23) functioning as an etch mask. A via is formed by at least partly filling the via hole with conductive material. A substrate for electronic devices comprising a via is also provided.
Public/Granted literature
- US20110201197A1 METHOD FOR MAKING VIA INTERCONNECTION Public/Granted day:2011-08-18
Information query
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