Invention Grant
US08742799B2 Systems and methods for de-emphasis level calibration in voltage mode drivers
有权
电压模式驱动器中去加重电平校准的系统和方法
- Patent Title: Systems and methods for de-emphasis level calibration in voltage mode drivers
- Patent Title (中): 电压模式驱动器中去加重电平校准的系统和方法
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Application No.: US13598905Application Date: 2012-08-30
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Publication No.: US08742799B2Publication Date: 2014-06-03
- Inventor: Yu-Nan Shih
- Applicant: Yu-Nan Shih
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: H03L7/06
- IPC: H03L7/06
Abstract:
A voltage mode driver circuit includes a plurality of VMD cells and a calibration component. The plurality of VMD cells are configured to generate a calibrated emphasis level according to a calibration signal. The calibration component is configured to determine a voltage dependence effect. Additionally, the calibration component is configured to generate the calibration signal according to the determined voltage dependence effect.
Public/Granted literature
- US20140062538A1 Systems and Methods for De-Emphasis Level Calibration in Voltage Mode Drivers Public/Granted day:2014-03-06
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