A video test pattern generator and method include a control sequencer configured to control one or more address counters to generate a video test pattern. A first memory is configured to store pixel values for transitions between portions of the video test pattern and configured to store a repeated pixel value. A second memory is configured to store pattern information to determine placement of the pixel values for the transitions and the repeated pixel values. A repeat counter is configured to control a number of the repeated pixel values produced before a next transition.