Invention Grant
- Patent Title: Size-reduced magnetic memory cell
- Patent Title (中): 尺寸减小的磁记忆体
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Application No.: US13615192Application Date: 2012-09-13
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Publication No.: US08743595B2Publication Date: 2014-06-03
- Inventor: Naoki Kitano
- Applicant: Naoki Kitano
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Priority: JP2011-199042 20110913
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C11/16 ; H01L27/112

Abstract:
A semiconductor device includes: a first memory cell, a second memory cell adjacent to the first memory cell, first and second write bitlines and a common bitline. The first memory cell includes: a first magnetization fixed layer, a first magnetic recording layer, a first reference layer, a first tunnel barrier film, and a first transistor. The second memory cell includes: a second magnetization fixed layer, a second magnetic recording layer, a second reference layer, a second tunnel barrier layer and a second transistor. Each of the first and second reference layer has a fixed magnetization. A common magnetization fixed layer having a fixed magnetization is coupled to the first and second magnetic recording layers. The common magnetization fixed layer and the common bitline is connected so that the common magnetization fixed layer and the common bitline are unable to be electrically unconnected.
Public/Granted literature
- US20130064009A1 SIZE-REDUCED MAGNETIC MEMORY CELL Public/Granted day:2013-03-14
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