Invention Grant
- Patent Title: Method and circuit for testing a multi-chip package
- Patent Title (中): 用于测试多芯片封装的方法和电路
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Application No.: US13564189Application Date: 2012-08-01
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Publication No.: US08743638B2Publication Date: 2014-06-03
- Inventor: Chun-Hsiung Hung , Wen-Chiao Ho , Kuen-Long Chang
- Applicant: Chun-Hsiung Hung , Wen-Chiao Ho , Kuen-Long Chang
- Applicant Address: TW Hsinchu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A method and circuit for testing a multi-chip package is provided. The multi-chip package includes at least a memory chip, and the memory chip includes a number of memory cells. The method includes performing a normal read operation on the memory cells to check if data read from the memory cells is the same with preset data in the memory cells; and performing a special read operation on the memory cells to check if data read from the memory cells is the same with an expected value, wherein the expected value is independent from data stored in the memory cells.
Public/Granted literature
- US20120300562A1 METHOD AND CIRCUIT FOR TESTING A MULTI-CHIP PACKAGE Public/Granted day:2012-11-29
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