Invention Grant
- Patent Title: Peak power suppressing circuit and communication device having the same
- Patent Title (中): 峰值功率抑制电路及其通信装置
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Application No.: US13575009Application Date: 2010-11-15
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Publication No.: US08744002B2Publication Date: 2014-06-03
- Inventor: Takashi Maehata , Mikhail Illarionov
- Applicant: Takashi Maehata , Mikhail Illarionov
- Applicant Address: JP Osaka
- Assignee: Sumitomo Electric Industries, Ltd.
- Current Assignee: Sumitomo Electric Industries, Ltd.
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2010-039079 20100224
- International Application: PCT/JP2010/070284 WO 20101115
- International Announcement: WO2011/104951 WO 20110901
- Main IPC: H04K1/02
- IPC: H04K1/02 ; H04L25/03 ; H04L25/49

Abstract:
A peak power suppressing circuit can suppress a peak power of an IQ (In-phase and Quadrature-phase) baseband signal more assuredly. In particular, the peak power suppressing circuit performs a clipping process on an IQ baseband signal. The suppressing circuit includes a power calculation section that calculates an instantaneous power P of an IQ baseband signal, a pulse retention section that retains a cancellation pulse S that has a frequency component in a frequency band B of the IQ baseband signal and a frequency component outside the frequency band, and a clipping processing section that subtracts, from an IQ baseband signal whose instantaneous power P that has been calculated is greater than a predetermined threshold Pth, cancellation signals Ic and Qc obtained by multiplying increments ΔI and ΔQ of the IQ baseband signal from the threshold Pth by the cancellation pulse S.
Public/Granted literature
- US20120300824A1 PEAK POWER SUPPRESSING CIRCUIT AND COMMUNICATION DEVICE HAVING THE SAME Public/Granted day:2012-11-29
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