Invention Grant
- Patent Title: Adder
- Patent Title (中): 加法器
-
Application No.: US13349871Application Date: 2012-01-13
-
Publication No.: US08745120B2Publication Date: 2014-06-03
- Inventor: Hirofumi Morise , Shiho Nakamura , Daisuke Saida , Tsuyoshi Kondo
- Applicant: Hirofumi Morise , Shiho Nakamura , Daisuke Saida , Tsuyoshi Kondo
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Amin, Turocy & Watson, LLP
- Main IPC: G06F7/50
- IPC: G06F7/50

Abstract:
According to an embodiment, an adder includes first and second wave computing units and a threshold wave computing unit. Each of the first and second wave computing units includes a pair of first input sections, a first wave transmission medium having a continuous film including a magnetic body connected to the first input sections, and a first wave detector outputting a result of computation by spin waves induced in the first wave transmission medium by the signals corresponding to the two bit values. The threshold wave computing unit includes a plurality of third input sections, a third wave transmission medium having a continuous film including a magnetic body connected to the third input sections, and a third wave detector a result of computation by spin waves induced in the third wave transmission medium.
Public/Granted literature
- US20120124120A1 ADDER Public/Granted day:2012-05-17
Information query