Inter-processor communication (IPC) apparatus and a method for providing communication between two processors having a shared memory, the IPC apparatus including an arbitrated bus coupling the processors to one another and to the memory, a buffer in the shared memory associated with each processor, and at least one pair of First In First Out hardware units (FIFOs) coupled to each processor, the FIFOs holding pointers to addresses in the buffer associated with that processor, wherein a first of the pair of FIFOs (an empty buffer FIFO) is configured to hold pointers to empty portions of the buffer while the second of the pair of FIFOs (a message FIFO) is configured to hold pointers to portions of the buffer having data therein.