Invention Grant
- Patent Title: Processor and address translating method
- Patent Title (中): 处理器和地址转换方法
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Application No.: US12825959Application Date: 2010-06-29
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Publication No.: US08745356B2Publication Date: 2014-06-03
- Inventor: Masaharu Maruyama
- Applicant: Masaharu Maruyama
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2009-156305 20090630
- Main IPC: G06F9/26
- IPC: G06F9/26 ; G06F9/34

Abstract:
An address translation buffer of a processor including a memory unit that has a first area with first entries storing first address translation pairs of a virtual address and a physical address corresponding to the virtual address, each of the first address translation pairs is subjected to a index tag which is a part of the virtual address, and a second area with second entries storing second address translation pairs, each of the second address translation pairs is subjected to a whole part of the virtual address, and a search unit that searches the first area for an address translation pair by using a index tag included in a virtual address to be translated, and searches the second area for the address translation pair by using a whole part of the virtual address when the address translation pair is not found in the first area.
Public/Granted literature
- US20100332790A1 PROCESSOR AND ADDRESS TRANSLATING METHOD Public/Granted day:2010-12-30
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