Invention Grant
- Patent Title: Processor to execute shift right merge instructions
- Patent Title (中): 处理器执行转移合并指令
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Application No.: US13602546Application Date: 2012-09-04
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Publication No.: US08745358B2Publication Date: 2014-06-03
- Inventor: Julien Sebot , William W. Macy , Eric Debes , Huy V. Nguyen
- Applicant: Julien Sebot , William W. Macy , Eric Debes , Huy V. Nguyen
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F15/00
- IPC: G06F15/00 ; G06F15/76 ; G06F9/30 ; G06F9/38 ; G06F15/80 ; G06F17/15 ; G06F17/14

Abstract:
Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
Public/Granted literature
- US20130007417A1 PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS Public/Granted day:2013-01-03
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