Invention Grant
US08745555B2 Method for integrated circuit design and manufacture using diagonal minimum-width patterns
有权
使用对角线最小宽度图案的集成电路设计和制造方法
- Patent Title: Method for integrated circuit design and manufacture using diagonal minimum-width patterns
- Patent Title (中): 使用对角线最小宽度图案的集成电路设计和制造方法
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Application No.: US12779031Application Date: 2010-05-12
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Publication No.: US08745555B2Publication Date: 2014-06-03
- Inventor: Akira Fujimura , Larry Lam Chau , Tam Dinh Thanh Nguyen
- Applicant: Akira Fujimura , Larry Lam Chau , Tam Dinh Thanh Nguyen
- Applicant Address: US CA San Jose
- Assignee: D2S, Inc.
- Current Assignee: D2S, Inc.
- Current Assignee Address: US CA San Jose
- Agency: The Mueller Law Office, P.C.
- Main IPC: H01L29/72
- IPC: H01L29/72

Abstract:
Methods for designing and manufacturing an integrated circuit are disclosed, in which the physical design process for a standard cell or cells utilizes a preferred diagonal direction for minimum-width patterns on at least one layer, where the standard cell or cells are used in the layout of an integrated circuit. The methods also include forming the patterns on a photomask using model-based fracturing techniques with charged particle beam simulation, and forming the patterns on a substrate such a silicon wafer using the photomask and an optical lithographic process with directional illumination which is optimized for the preferred diagonal direction.
Public/Granted literature
- US20110278731A1 METHOD FOR INTEGRATED CIRCUIT DESIGN AND MANUFACTURE USING DIAGONAL MINIMUM-WIDTH PATTERNS Public/Granted day:2011-11-17
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