Invention Grant
- Patent Title: Joining method and semiconductor device manufacturing method
- Patent Title (中): 接合方法和半导体器件制造方法
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Application No.: US13655875Application Date: 2012-10-19
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Publication No.: US08746538B2Publication Date: 2014-06-10
- Inventor: Aya Muto , Masayoshi Shinkai
- Applicant: Aya Muto , Masayoshi Shinkai
- Applicant Address: JP Tokyo
- Assignee: Mitsubishi Electric Corporation
- Current Assignee: Mitsubishi Electric Corporation
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-257090 20111125; JP2012-183833 20120823
- Main IPC: B23K31/02
- IPC: B23K31/02

Abstract:
A joining method that allows joining processing to be carried out simultaneously at a plurality of portions without being influenced by a supply time restriction on a joining material, and a semiconductor device manufacturing method using the joining method are provided. A chip and a lead frame are tentatively assembled having a solid solder block interposed therebetween. The solder block is provided with protruding parts that protrude in one direction. The protruding parts are inserted into solder supply ports of the lead frame, whereby the chip and the lead frame are tentatively assembled. Subsequently, the chip and the lead frame are fed into a reflow oven, and the solder block is melted and thereafter solidified. Thus, the chip and the lead frame are joined to each other.
Public/Granted literature
- US20130134210A1 JOINING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2013-05-30
Information query
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