Invention Grant
US08748210B2 Method of manufacturing semiconductor device having air gaps in multilayer wiring structure
失效
制造在多层布线结构中具有气隙的半导体器件的方法
- Patent Title: Method of manufacturing semiconductor device having air gaps in multilayer wiring structure
- Patent Title (中): 制造在多层布线结构中具有气隙的半导体器件的方法
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Application No.: US13707887Application Date: 2012-12-07
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Publication No.: US08748210B2Publication Date: 2014-06-10
- Inventor: Takeshi Aoki
- Applicant: Canon Kabushiki Kaisha
- Applicant Address: JP Tokyo
- Assignee: Canon Kabushiki Kaisha
- Current Assignee: Canon Kabushiki Kaisha
- Current Assignee Address: JP Tokyo
- Agency: Fitzpatrick, Cella, Harper & Scinto
- Priority: JP2009-137721 20090608
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/148 ; H01L31/00

Abstract:
A semiconductor device comprises a semiconductor substrate, and a multilayer wiring structure arranged on the semiconductor substrate, the multilayer wiring structure including a plurality of first electrically conductive lines, an insulating film covering the plurality of first electrically conductive lines, and a second electrically conductive line arranged on the insulating film so as to intersect the plurality of first electrically conductive lines, wherein the insulating film has gaps in at least some of a plurality of regions where the plurality of first electrically conductive lines and the second electrically conductive line intersect each other, and a width of the gap in a direction along the second electrically conductive line is not larger than a width of the first electrically conductive line.
Public/Granted literature
- US20130122644A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2013-05-16
Information query
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