Fin field-effect-transistor (FET) structure and manufacturing method

Invention Grant

US08748247B2 Fin field-effect-transistor (FET) structure and manufacturing method 有权

Title translation: Fin场效应晶体管（FET）结构及制造方法

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Patent Title: Fin field-effect-transistor (FET) structure and manufacturing method
Patent Title (中): Fin场效应晶体管（FET）结构及制造方法
Application No.: US13686300

Application Date: 2012-11-27
Publication No.: US08748247B2

Publication Date: 2014-06-10
Inventor: Mieno Fumitake
Applicant: Mieno Fumitake
Applicant Address: CN Shanghai
Assignee: Semiconductor Manufacturing International Corp
Current Assignee: Semiconductor Manufacturing International Corp
Current Assignee Address: CN Shanghai
Agency: Anova Law Group, PLLC
Priority: CN201210165855 20120524
Main IPC: H01L21/8238
IPC: H01L21/8238

Fin field-effect-transistor (FET) structure and manufacturing method

Abstract:

A method for fabricating a semiconductor structure includes providing a semiconductor substrate having a first region and a second region, and doping top of the semiconductor substrate to form a doped layer at top surface of the semiconductor substrate over the first region and the second region. The method also includes etching the doped layer to form a first sub-fin in the first region and a first sub-fin in the second region, and forming an insulating layer over the semiconductor substrate including the first sub-fin in the first region and the first sub-fin in the second region. Further, the method includes removing top portions of the first sub-fin in the first region and the first sub-fin in the second region and forming corresponding second sub-fins.

Abstract(Chinese):

一种制造半导体结构的方法包括：提供具有第一区域和第二区域的半导体衬底，以及掺杂半导体衬底的顶部，以在第一区域和第二区域的半导体衬底顶表面上形成掺杂层。该方法还包括蚀刻掺杂层以在第一区域中形成第一子鳍和在第二区中形成第一子鳍，并且在包括第一区中的第一子鳍的半导体衬底之上形成绝缘层，以及第二个地区的第一个分支机构。此外，该方法包括去除第一区域中的第一子鳍片的顶部和在第二区域中去除第一子鳍片并形成相应的第二子鳍片。

Public/Granted literature

US20130313619A1 FIN FIELD-EFFECT-TRANSISTOR (FET) STRUCTURE AND MANUFACTURING METHOD Public/Granted day:2013-11-28

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS