Invention Grant
US08748318B2 Methods of forming patterns in semiconductor constructions, methods of forming container capacitors, and methods of forming reticles configured for imprint lithography 有权
在半导体结构中形成图案的方法,形成容器电容器的方法,以及形成用于压印光刻的掩模版的方法

  • Patent Title: Methods of forming patterns in semiconductor constructions, methods of forming container capacitors, and methods of forming reticles configured for imprint lithography
  • Patent Title (中): 在半导体结构中形成图案的方法,形成容器电容器的方法,以及形成用于压印光刻的掩模版的方法
  • Application No.: US13330973
    Application Date: 2011-12-20
  • Publication No.: US08748318B2
    Publication Date: 2014-06-10
  • Inventor: Gurtej S. Sandhu
  • Applicant: Gurtej S. Sandhu
  • Applicant Address: US ID Boise
  • Assignee: Micron Technology, Inc.
  • Current Assignee: Micron Technology, Inc.
  • Current Assignee Address: US ID Boise
  • Agency: Wells St. John P.S.
  • Main IPC: H01L21/311
  • IPC: H01L21/311 H01L21/461
Methods of forming patterns in semiconductor constructions, methods of forming container capacitors, and methods of forming reticles configured for imprint lithography
Abstract:
The invention includes methods of forming reticles configured for imprint lithography, methods of forming capacitor container openings, and methods in which capacitor container openings are incorporated into DRAM arrays. An exemplary method of forming a reticle includes formation of a radiation-imageable layer over a material. A lattice pattern is then formed within the radiation-imageable layer, with the lattice pattern defining a plurality of islands of the radiation-imageable layer. The lattice-patterned radiation-imageable layer is utilized as a mask while subjecting the material under the lattice-patterned layer to an etch which transfers the lattice pattern into the material. The etch forms a plurality of pillars which extend only partially into the material, with the pillars being spaced from one another by gaps. The gaps are subsequently narrowed with a second material which only partially fills the gaps.
Information query
IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L21/00 专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02 .半导体器件或其部件的制造或处理
H01L21/04 ..至少具有一个跃变势垒或表面势垒的器件,例如PN结、耗尽层、载体集结层
H01L21/18 ...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体,如掺杂材料
H01L21/30 ....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的(在半导体材料上制作电极的入H01L21/28)
H01L21/31 .....在半导体材料上形成绝缘层的,例如用于掩膜的或应用光刻技术的(密封层入H01L21/56);以及这些层的后处理;这些层的材料的选择
H01L21/3105 ......后处理
H01L21/311 .......绝缘层的刻蚀
Patent Agency Ranking
0/0