Invention Grant
- Patent Title: Bipolar junction transistor with stair profile
- Patent Title (中): 具有阶梯型的双极结晶体管
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Application No.: US13629174Application Date: 2012-09-27
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Publication No.: US08748943B2Publication Date: 2014-06-10
- Inventor: Krister Gumaelius
- Applicant: Fairchild Semiconductor Corporation
- Applicant Address: US CA San Jose
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Priority: SE1050298 20100330
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A semiconductor device and a method of forming a structure in a target substrate for manufacturing a semiconductor device is provided. The method comprises the step of providing a masking layer on the target substrate and providing a stair-like profile in the masking layer such that the height of a step of the stair-like profile is smaller than the thickness of the masking layer. Further, the method comprises the step of performing anisotropic etching of the masking layer and the target substrate simultaneously such that a structure having a stair-like profile is formed in the target substrate. The semiconductor device comprises a target substrate including a first region made of a first type of semiconductor material and a second region made of a second type of semiconductor material.
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