Invention Grant
- Patent Title: Thee-dimensional integrated semiconductor device and method for manufacturing same
- Patent Title (中): 该二维集成半导体器件及其制造方法
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Application No.: US12782749Application Date: 2010-05-19
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Publication No.: US08749041B2Publication Date: 2014-06-10
- Inventor: Yoshiharu Ogata , Tadashi Aizawa , Takeo Kitazawa
- Applicant: Yoshiharu Ogata , Tadashi Aizawa , Takeo Kitazawa
- Applicant Address: JP
- Assignee: Seiko Epson Corporation
- Current Assignee: Seiko Epson Corporation
- Current Assignee Address: JP
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: JP2006-043270 20060221
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
A semiconductor device includes a first semiconductor chip that is mounted face-down on a substrate, a second semiconductor chip that is mounted face-up on the first semiconductor chip, and a dummy chip that is interposed between the first semiconductor chip and the second semiconductor chip. The dummy chip is made from a homogenous material comprising silicon or an alloy containing an atomic percentage majority of silicon.
Public/Granted literature
- US20100230827A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2010-09-16
Information query
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