Invention Grant
- Patent Title: Method of semiconductor integrated circuit fabrication
- Patent Title (中): 半导体集成电路制造方法
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Application No.: US13624384Application Date: 2012-09-21
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Publication No.: US08749060B2Publication Date: 2014-06-10
- Inventor: Ming Han Lee , Tz-Jun Kuo , Chien-Hsin Ho , Hsiang-Huan Lee
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L23/40

Abstract:
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate. A patterned dielectric layer with a plurality of openings is formed on the substrate. A barrier layer is deposited in the openings by a first tool and a sacrificing protection layer is deposited on the barrier layer by the first tool. The sacrificing layer is removed and a metal layer is deposited on the barrier layer by a second tool.
Public/Granted literature
- US20140084469A1 METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION Public/Granted day:2014-03-27
Information query
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