Invention Grant
- Patent Title: Programmable scannable storage circuit
- Patent Title (中): 可编程可扫描存储电路
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Application No.: US13291263Application Date: 2011-11-08
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Publication No.: US08749286B2Publication Date: 2014-06-10
- Inventor: Pranjal Tiwari , Aishwarya Dubey , Naishad Narendra Parikh , Puneet Sabbarwal , Anand Bhat
- Applicant: Pranjal Tiwari , Aishwarya Dubey , Naishad Narendra Parikh , Puneet Sabbarwal , Anand Bhat
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Ronald O. Neerings; Wade James Brady; Frederick J. Telecky, Jr.
- Main IPC: H03K3/00
- IPC: H03K3/00 ; H03K3/012

Abstract:
A scannable storage circuit includes a scan enable input, a storage element having a Node coupled to a data output buffer for driving a data output terminal. The data output buffer includes an inverter; a transmission gate having a first MOS transistor and a second MOS transistor with sources and drains coupled to each other, drains coupled to an output of the inverter and sources coupled to the data output terminal and gates coupled to the scan enable input and an inverted scan enable input. A third MOS transistor and a fourth MOS transistor is coupled to the sources of the first and second MOS transistors, the third MOS transistor and fourth MOS transistor are configured to pull up or pull down the data output terminal in response to a first control signal and a second control signal respectively. A scan output is generated from the output of the inverter.
Public/Granted literature
- US20130057329A1 Programmable Scannable Storage Circuit Public/Granted day:2013-03-07
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