Invention Grant
- Patent Title: Display device for reducing parasitic capacitance with a dummy scan line
- Patent Title (中): 用虚拟扫描线降低寄生电容的显示装置
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Application No.: US12734932Application Date: 2008-08-28
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Publication No.: US08749469B2Publication Date: 2014-06-10
- Inventor: Akihisa Iwamoto , Hideki Morii , Takayuki Mizunaga , Masahiro Hirokane , Yuuki Ohta
- Applicant: Akihisa Iwamoto , Hideki Morii , Takayuki Mizunaga , Masahiro Hirokane , Yuuki Ohta
- Applicant Address: JP Osaka
- Assignee: Sharp Kabushiki Kaisha
- Current Assignee: Sharp Kabushiki Kaisha
- Current Assignee Address: JP Osaka
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: JP2008-014202 20080124
- International Application: PCT/JP2008/065449 WO 20080828
- International Announcement: WO2009/093352 WO 20090730
- Main IPC: G09G3/36
- IPC: G09G3/36
Abstract:
A display device, in at least one embodiment, includes: a gate driver including a plurality of shift register stages each provided so as to correspond to each row, the gate driver outputting a gate signal for turning on switching elements in the each row; and a source driver outputting a data signal in accordance with an image to be displayed. For a row (first row) located at an outermost position from which scanning by use of the gate signal starts, a dummy line is provided. The dummy line is driven by a gate start pulse inputted into a shift register in the first row.
Public/Granted literature
- US20100238156A1 DISPLAY DEVICE AND METHOD FOR DRIVING DISPLAY DEVICE Public/Granted day:2010-09-23
Information query
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