Invention Grant
- Patent Title: Method of forming gate conductor structures
- Patent Title (中): 形成栅极导体结构的方法
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Application No.: US13103108Application Date: 2011-05-09
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Publication No.: US08758984B2Publication Date: 2014-06-24
- Inventor: Chang-Ming Wu , Yi-Nan Chen , Hsien-Wen Liu
- Applicant: Chang-Ming Wu , Yi-Nan Chen , Hsien-Wen Liu
- Applicant Address: TW Kueishan, Tao-Yuan Hsien
- Assignee: Nanya Technology Corp.
- Current Assignee: Nanya Technology Corp.
- Current Assignee Address: TW Kueishan, Tao-Yuan Hsien
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L21/70
- IPC: H01L21/70

Abstract:
A method of forming gate conductor structures. A substrate having thereon a gate electrode layer is provided. A multi-layer hard mask is formed overlying the gate electrode layer. The multi-layer hard mask comprises a first hard mask, a second hard mask, and a third hard mask. A photoresist pattern is formed on the multi-layer hard mask. A first etching process is performed to etch the third hard mask, using the photoresist pattern as a first etch resist, thereby forming a patterned third hard mask. A second etching process is performed to etch the second hard mask and the first hard mask, using the patterned third hard mask as a second etch resist, thereby forming a patterned first hard mask. A third etching process is performed to etch a layer of the gate electrode layer, using the patterned first hard mask as a third etch resist.
Public/Granted literature
- US20120288802A1 METHOD OF FORMING GATE CONDUCTOR STRUCTURES Public/Granted day:2012-11-15
Information query
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