Invention Grant
US08759154B2 TCE compensation for package substrates for reduced die warpage assembly
有权
TCE补偿用于减少模具翘曲组件的封装衬底
- Patent Title: TCE compensation for package substrates for reduced die warpage assembly
- Patent Title (中): TCE补偿用于减少模具翘曲组件的封装衬底
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Application No.: US13625932Application Date: 2012-09-25
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Publication No.: US08759154B2Publication Date: 2014-06-24
- Inventor: Margaret Simmons-Matthews
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Steven A. Shaw; Wade James Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48

Abstract:
A method for assembling die packages includes attaching contacts on a first side of a plurality of first die to substrate pads on a top surface of a composite carrier. The composite carrier includes a package substrate including at least one embedded metal layer having its bottom surface secured to a semiconductor wafer. The composite carrier minimizes effects of the CTE mismatch between the die and the package substrate during assembly reduces warpage of the die. After the attaching, the semiconductor wafer is removed from the package substrate. Electrically conductive connectors are attached to the bottom surface of the package substrate, and the package substrate is sawed to form a plurality of singulated die packages.
Public/Granted literature
- US20130029457A1 TCE Compensation for Package Substrates for Reduced Die Warpage Assembly Public/Granted day:2013-01-31
Information query
IPC分类: