Invention Grant
US08759169B2 Method for producing silicon semiconductor wafers comprising a layer for integrating III-V semiconductor components
有权
包括用于集成III-V半导体部件的层的硅半导体晶片的制造方法
- Patent Title: Method for producing silicon semiconductor wafers comprising a layer for integrating III-V semiconductor components
- Patent Title (中): 包括用于集成III-V半导体部件的层的硅半导体晶片的制造方法
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Application No.: US13504197Application Date: 2010-11-02
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Publication No.: US08759169B2Publication Date: 2014-06-24
- Inventor: Gabriel Kittler , Ralf Lerner
- Applicant: Gabriel Kittler , Ralf Lerner
- Applicant Address: DE Erfurt
- Assignee: X—FAB Semiconductor Foundries AG
- Current Assignee: X—FAB Semiconductor Foundries AG
- Current Assignee Address: DE Erfurt
- Agency: Stevens & Showalter, LLP
- Priority: DE102009051520 20091031
- International Application: PCT/EP2010/066642 WO 20101102
- International Announcement: WO2011/051499 WO 20110505
- Main IPC: H01L21/338
- IPC: H01L21/338

Abstract:
The invention relates to a method for producing silicon semiconductor wafers and components having layer structures of III-V layers for integrating III-V semiconductor components. The method employs SOI silicon semiconductor wafers having varying substrate orientations, and the III-V semiconductor layers are produced in trenches (28, 43, 70) produced by etching within certain regions (38, 39), which are electrically insulated from each other, of the active semiconductor layer (24, 42) by means of a cover layer or cover layers (29) using MOCVD methods.
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