Invention Grant
- Patent Title: Patterning of submicron pillars in a memory array
- Patent Title (中): 存储器阵列中亚微米柱的图案化
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Application No.: US12422072Application Date: 2009-04-10
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Publication No.: US08759176B2Publication Date: 2014-06-24
- Inventor: Usha Raghuram , Michael W. Konevecki
- Applicant: Usha Raghuram , Michael W. Konevecki
- Applicant Address: US CA Milpitas
- Assignee: SanDisk 3D LLC
- Current Assignee: SanDisk 3D LLC
- Current Assignee Address: US CA Milpitas
- Agency: Dugan & Dugan, PC
- Main IPC: H01L21/8234
- IPC: H01L21/8234

Abstract:
Methods in accordance with the invention involve patterning and etching very small dimension pillars, such as in formation of a memory array in accordance with the invention. When dimensions of pillars become very small, the photoresist pillars used to pattern them may not have sufficient mechanical strength to survive the photoresist exposure and development process. Using methods according to the present invention, these photoresist pillars are printed and developed larger than their intended final dimension, such that they have increased mechanical strength, then are shrunk to the desired dimension during a preliminary etch performed before the etch of underlying material begins.
Public/Granted literature
- US20090224244A1 PATTERNING OF SUBMICRON PILLARS IN A MEMORY ARRAY Public/Granted day:2009-09-10
Information query
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