Invention Grant
- Patent Title: Method for forming bumps in substrates with through vias
- Patent Title (中): 在具有通孔的基板中形成凸块的方法
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Application No.: US12537075Application Date: 2009-08-06
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Publication No.: US08759215B2Publication Date: 2014-06-24
- Inventor: Gian Pietro Vanalli , Giovanni Campardo , Aldo Losavio , Paolo Pulici , Pier Paolo Stoppino
- Applicant: Gian Pietro Vanalli , Giovanni Campardo , Aldo Losavio , Paolo Pulici , Pier Paolo Stoppino
- Applicant Address: IT Agrate Brianza (MB) IT Milan
- Assignee: STMicroelectronics S.r.l.,Politecnico di Milano
- Current Assignee: STMicroelectronics S.r.l.,Politecnico di Milano
- Current Assignee Address: IT Agrate Brianza (MB) IT Milan
- Agency: Wolf, Greenfield & Sacks, P.C.
- Priority: ITMI2008A1505 20080808
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A method for manufacturing solder bumps for through vias in a substrate having a first surface and a second surface opposed to each other. The method includes the steps of forming a blind hole extending in the substrate from the first surface for each via and filling each blind hole with a conductive filler; a deepest part of each filler includes a bump portion made of a solder material. The method further includes the step of removing a part of the substrate extending from the second surface to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding bump.
Public/Granted literature
- US20100032834A1 METHOD FOR FORMING BUMPS IN SUBSTRATES WITH THROUGH VIAS Public/Granted day:2010-02-11
Information query
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